Difference between revisions of "Theses"

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== Ph.D   ==
 
== Ph.D   ==
  
*Javier Lira, '''Managing Dynamic Non-Uniform Cache Architectures''', Ph.D Thesis, Universitat Politècnica de Catalunya, November 2011. [[Media:Lira_phd.pdf|(Document)]],[[Media:Lira_phd.pptx|(Slides)]]
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*Javier Lira, '''Managing Dynamic Non-Uniform Cache Architectures''', Ph.D Thesis, Universitat Politècnica de Catalunya, November 2011. [[Media:Lira_phd.pdf|(Document)]],[[Media:Lira_phd.zip|(Slides)]]
  
 
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Revision as of 15:47, 26 November 2011

Master 

  • Jorge Martínez, DRAM-based on-chip cache architectures , Msc Thesis, Universitat Politècnica de Catalunya, September 2010.


  • Shrikanth Ganapathy, Effect of Spatio-Temporal Variations on Memory Systems, Msc Thesis, Universitat Politècnica de Catalunya, July 2009.


  • Javier Lira, Data Replacement Policy on Non-Uniform Cache Architectures for Chip Multiprocessors, Msc Thesis, Universitat Politècnica de Catalunya, September 2008.


  • Marc Lupon, Hardware Approaches for Transactional Memory, Msc Thesis/PFC, Universitat Politècnica de Catalunya, June 2008. (Document)


  • Enric Herrero, ArchitecturalLevel Power Simulator of the Memory Hierarchy of Chip Multiprocessors, Msc Thesis, Universitat Politècnica de Catalunya, June 2007.


Ph.D 

  • Javier Lira, Managing Dynamic Non-Uniform Cache Architectures, Ph.D Thesis, Universitat Politècnica de Catalunya, November 2011. (Document),(Slides)


  • Rakesh Ranjan, Speeding Up Sequential Applications on Multicore Platforms, Ph.D Thesis, Univesitat Politécnica de Catalunya, November 2010.


  • Carlos Molina, Microarchitectural Techniques to Exploit Repetitive Computations and Values, Ph.D Thesis, Universitat Politècnica de Catalunya, December 2005. (Document),(Slides)


  • Enric Gibert, Clustered Data Cache Designs for VLIW Processors, PhD Thesis, Universitat Politècnica de Catalunya, November 2005. (Document),(Slides)


  • Jaume Abella, Adaptive and Low-Complexity Microarchitectures for Power Reduction, Ph.D Thesis, Universitat Politècnica de Catalunya, July 2005. (Document)


  • Ramon Canal, Power- and Performance- Aware Architectures, PhD. Thesis, Universitat Politècnica de Catalunya, Advisors: Antonio González and James E. Smith. June 2004.(Document)(slides)