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= ARCO Research Group <br>  =
 
= ARCO Research Group <br>  =
  
The research group ARCO (Architectures and Compilers) at the Universitat Politècnica de Catalunya (UPC) in Barcelona, Catalonia (Spain-EU) is formed by members of the Department of Computer Architecture at UPC, members of the Intel-UPC Barcelona Research Center and members of the Computer Science Department at the Universitat Rovira Virgili (URV). The group is formed by professors, PhD students, and post-doc researchers. The research of the group focuses on microarchitectures and compilers for future processors, bearing in mind the underlying technology. The main goal is to increase performance, enhance reliability and reduce power dissipation of future processors.<br>  
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The research group ARCO (Architectures and Compilers) at the Universitat Politècnica de Catalunya (UPC) in Barcelona, Catalonia (Spain-EU) is formed by members of the Department of Computer Architecture at UPC, members of the Computer Science Department at the Universitat Rovira Virgili (URV) and external collaborators from industry . The group is formed by professors, PhD students, and post-doc researchers. The research of the group focuses on microarchitectures and compilers for future processors, bearing in mind the underlying technology. The main goal is to increase performance, enhance reliability and reduce power dissipation of future processors.<br>  
  
 
*[[People|People]]  
 
*[[People|People]]  

Revision as of 21:33, 28 May 2014

ARCO Research Group

The research group ARCO (Architectures and Compilers) at the Universitat Politècnica de Catalunya (UPC) in Barcelona, Catalonia (Spain-EU) is formed by members of the Department of Computer Architecture at UPC, members of the Computer Science Department at the Universitat Rovira Virgili (URV) and external collaborators from industry . The group is formed by professors, PhD students, and post-doc researchers. The research of the group focuses on microarchitectures and compilers for future processors, bearing in mind the underlying technology. The main goal is to increase performance, enhance reliability and reduce power dissipation of future processors.


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