Projects

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Microarquitecture and Compilers for Future Processors III (2014-2016)

The main objective of this project as for the researchers of the ARCO group is the research in the design of future microprocessors, taking into account the determining factors of future technology, both for high performance processors and for commodity electronics. Fundamentally, two factors have determined the increased performance in processors: on one hand the technological advances in microprocessor manufacturing and, on the other hand, the use of new and more efficient microarchitectural and compiler techniques. All these improvements bring a number of challenges that are now considered as key in designing the processors for this upcoming decade: the limited instruction-level parallelism, the interconnection network delays, high power consumption, heat dissipation, system relibility and security. In this project we are going to address the influence of these issues in the research of future processors. Specifically, we will address six areas that we consider fundamental:

  1. The efficient design of circuits in the presence of unexpected changes in its operating parameters
  2. The efficient design of graphic processors oriented to mobile devices
  3. The efficient implementation of virtual machines with low complexity but high computing power
  4. The characterization and acceleration of emerging applications
  5. The design of new heterogeneous multiprocessor architectures that optimize the use of the different processors depending on the types of application being executed
  6. The study of new techniques in the design of the memory hierarchy and interconnection networks to tolerate the increasing gap between the speeds of the various components of the computer.


Microarquitecture and Compilers for Future Processors II (2010-2014)

The main objective of this project as for the researchers of the ARCO group is the research in the design of future microprocessors, taking into account the determining factors of future technology, both for high performance processors and for commodity electronics. Fundamentally, two factors have determined the increased performance in processors: on one hand the technological advances in microprocessor manufacturing and, on the other hand, the use of new and more efficient microarchitectural and compiler techniques. All these improvements bring a number of challenges that are now considered as key in designing the processors for this upcoming decade: the limited instruction-level parallelism, the interconnection network delays, high power consumption, heat dissipation, system relibility and security. In this project we are going to address the influence of these issues in the research of future processors. Specifically, we will focus on five areas which we consider to be fundamental:

  1. The study of new techniques in the memory hierarchy design to tolerate the increasing gap between processor and memory speeds
  2. The efficient circuit design in the face of unexpected variations of their working parameters
  3. The implementation of efficient virtual machines of low complexity but high level computing
  4. The implementation of intrusion detection systems to assure a high computer security level
  5. Characterization and acceleration of emerging applications
  6. The design of novel multithreaded processors to exploit thread-level parallelism


Microarquitecture and Compilers for Future Processors (2006-2010)

The main objective in this project is to research the design of next decade processors considering the requirements of the technology which is estimated to be feasible for the next years. Till recently, processor performance was mainly determined by two factors: technological advances in microprocessor manufacturing and the use of new and more efficient microarchitectural and compiler techniques. Now, new challenges are approached, for instance: high power consumption, heat dissipation, wire delays, design complexity, and the limited instruction-level parallelism. In this project we are going to address the influence of these issues in the research of future processors. Specifically, we will focus on seven areas which we consider to be fundamental:

  1. The reduction in power consumption and better approaches for heat dissipation
  2. The exploitation of thread-level speculative parallelism
  3. The design of clustered microarchitectures
  4. The efficient implementation of ISA extensions for out-of-order processors
  5. The efficient implementation of co-designed virtual machines;
  6. The study of new techniques in the register file and cache memory design to tolerate the increasing gap between processor and memory speeds;
  7. The efficient circuit design in the face of unexpected variations of their working parameters.


Project Bureaucracy